This invention relates to electronic circuitry, and more particularly to making electrical connections between adjacent electronic components in an assembly of such components.
Many electronic systems require multiple electronic components, such as packaged integrated circuit devices, to be placed close together for such purposes as overall system compactness, electrical interconnections of the shortest possible length for increased signaling speed and reduced signal attenuation, etc. It is known to place such components on a printed circuit board (“PCB”), whereby input and/or output (“IO”) pins of the components can be interconnected via printed circuit traces on the PCB. Package-on-package (“POP”) assembly of such components is also known in which, for example, a packaged integrated circuit with IO or exposed electrical contacts on its lower surface is mounted on top of another such component having IO pins or exposed electrical contacts on its upper surface. The lower surface contacts on the first-mentioned component and the upper surface contacts on the second-mentioned component are vertically aligned with one another and electrically connect to one another, either directly or via some conductive medium such as solder, anisotropic conductive film (“ACF”), or the like.
Further improvements to techniques for interconnecting electronic components in systems are needed for reasons such as the following. Component size is becoming smaller, but the number of required interconnections is becoming larger. This places constraints on how many IO contacts a component can have if contacts are confined to the traditional locations (e.g., the bottom of a component for mounting on a PCB, and/or the top and bottom of a component that will be mounted on a PCB with another component mounted on top via POP). More ways to get signals into and/or out of a component and to and/or from adjacent components are therefore needed.